CourseWiki/Engineering Fundamentals/Electrical Systems

Pulse-Width Modulation

Explore duty cycle, frequency, average voltage and RC smoothing, then compare PWM output with ADC input.

Duty cycle is the fraction of each cycle spent HIGH

Pulse-width modulation (PWM) repeats a rectangular waveform. The period T is the time for one cycle; frequency f is cycles per second. Duty cycle D is the fraction of the period spent HIGH.

T = 1/f, t_on = D × T, and for ideal switching between 0 V and a supply V_s, V_average = D × V_s. Convert a percentage to a fraction: 25% means D = 0.25.

Three PWM waveforms with equal periods and duty cycles of 25, 50 and 75 percent. The HIGH time increases while the period stays fixed.

At 500 Hz, T = 0.002 s = 2 ms = 2000 µs. At 25% duty, the on-time is 500 µs and the average of a 0–5 V output is 1.25 V. The pin itself still switches between 0 and 5 V.

The stock Uno R3 uses six PWM pins

Use digital pins 3, 5, 6, 9, 10 and 11. Default PWM is approximately 490 Hz on 3, 9, 10 and 11, and 980 Hz on 5 and 6. These correspond to periods of about 2.04 ms and 1.02 ms.

analogWrite(pin, value) requests duty using values from 0 (always off) to 255 (always on). A useful nominal mapping is value = round(255 × D): 25% gives 64. Hardware timer modes introduce small differences in the exact duty, particularly near the ends of the range.

Official frequency table and timer limitations

The Uno R3 row of Arduino's analogWrite reference source states “490 Hz (pins 5 and 6: 980 Hz)”. See also the published analogWrite reference. A frequency near 31 kHz requires changing timer configuration; it is not the stock setting. analogWrite sets duty, not frequency. Arduino's Secrets of Arduino PWM explains prescalers and timer modes. Changing timers can also affect other functions and libraries.

Change duty and frequency, then compare an ADC reading; Interactive

Change duty and frequency, then compare an ADC reading

Print / static comparison: 25% duty at 500 Hz gives a 2 ms period, 0.5 ms HIGH time and a 1.25 V complete-cycle time mean for an ideal 0–5 V waveform. A point sample is one instant, not that average.

The same PWM waveform sampled at different phases
Finite sample set	Each raw sample	Selected-sample mean	ADC code / lower edge
500 samples/s, phase 10%	5 V	5 V	1023 / 4.995117 V
500 samples/s, phase 60%	0 V	0 V	0 / 0 V
2000 samples/s, phases 1%, 26%, 51%, 76%	5, 0, 0, 0 V	1.25 V	Mean lower edge 1.248779 V

An unloaded 10 kΩ / 1 µF RC filter has a 10 ms time constant. In the settled repeating response its 25%, 500 Hz ripple runs from about 1.1579 V to 1.3453 V while its cycle mean remains 1.25 V. Changing a control recomputes that settled response; this model does not show startup.

With a separate 5.000 V ADC input, 3.000 V gives code 614; code 800 has lower edge 3.90625 V.

The explorer is a model, not a board connection. Its frequency and sampling controls do not configure an Uno or claim a board throughput. A raw sample uses normalized phase with HIGH on [0, D) and LOW on [D, 1); the stated finite sample count defines the reported sample mean. ADC controls use the ideal bin convention on Analog-to-Digital Conversion; 5.000 V is assumed exact.

Why more samples can still give the wrong mean

If the sample clock repeatedly lands at the same PWM phase, every point can read HIGH or every point can read LOW even though the full-cycle time mean is 1.25 V. A sample-and-hold output keeps the most recent point value between samples; holding is not averaging. A carefully spaced finite set can match the cycle mean, but a higher rate or larger count alone does not guarantee an unbiased result. This bounded comparison does not claim reconstruction of an unbandlimited switching edge from a Nyquist test.

An RC filter smooths PWM but leaves ripple

Put a resistor in series with the PWM signal and a capacitor from the output node to ground; measure the voltage across the capacitor. This RC low-pass filter slows voltage changes. The capacitor charges while PWM is HIGH and discharges while it is LOW.

The time constant is τ = R × C. A longer time constant relative to the PWM period reduces ripple but makes the output respond more slowly when duty changes. The explorer shows the settled waveform with τ = 10 ms, assuming an ideal source and no load. A load changes the result; the filter is not a motor power supply.

Microchip's AVR131 PWM filtering note explains the tradeoff: the low-pass filter must reject PWM base-frequency ripple without removing the slower signal of interest, and a low-impedance load can discharge the capacitor unless buffered. This explorer deliberately assumes no load.

What the smoothed trace calculates

During each constant input interval, V(t) = V_target + (V_start − V_target)e^−t/τ. The model solves for a repeating steady state, then draws the charging and discharging curves. It omits startup, output resistance, component tolerances and loading. At 0% or 100%, the settled output is simply 0 V or 5 V.

PWM changes LED brightness and motor drive; Practice

PWM changes LED brightness and motor drive

Rapid switching changes an LED's average light output while a resistor or driver limits its on-state current. Perceived brightness is not perfectly proportional to duty. For a DC motor, PWM commands a suitable power driver; the board pin does not supply the motor current. The driver must handle the motor and its inductive current.

Increasing duty usually increases the available drive, but motor speed also depends on load. Use DC Motor Torque, Speed, and Power to connect speed, torque and current. See Electrical Safety before wiring.

Practice PWM calculations

Appears in

DET 403 DET Microcontroller Basics